TSMC 20nm and CoWoS™ Design Infrastructure Ready
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TSMC 20nm and CoWoS™ Design Infrastructure Ready

Taipei : Taiwan | Oct 09, 2012 at 12:22 AM PDT
Source: PR Newswire
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announced today that the readiness of 20nm and CoWoS design support within the Open Innovation Platform ® (OIP) is demonstrated by the delivery of two foundry-first reference flows supporting 20nm and CoWoS (Chip on Wafer on Substrate) technologies. FULL ARTICLE AT PR Newswire
 
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